New Delhi [India], March 3 : Prioritising talent development under the Government of India's Semiconductor Mission, Union Minister for Railways and Electronics & IT, Ashwini Vaishnaw, stated that India has achieved its 10-year target of training 85,000 engineers in semiconductor design in just 4 years.
The Minister on Monday informed that world-class Electronic Design Automation (EDA) tools, Cadence, Synopsys, and Siemens, have been made available in 315 universities across the country, and with the help of these tools, students are designing actual semiconductor chips, according to a release.
These chips are being fabricated and tested at the Semiconductor Laboratory (SCL) in Mohali, giving students hands-on experience across the entire process from design to manufacturing and validation, he said.
Vaishnaw further stated that students from universities across the nation, from Assam to Gujarat and from Kashmir to Kanyakumari, are actively engaging in semiconductor design. This marks a significant milestone toward India's technological capability and self-reliance.
Highlighting global industry requirements, the Union Minister said that as the semiconductor industry grows from the current size of USD 800-900 billion to USD 2 trillion, there will be a demand for nearly 2 million skilled professionals. This presents massive employment opportunities for India's youth.
He announced that under Semicon 2.0, the program will be expanded from 315 universities to 500 universities. This will help build a strong and continuous pool of trained talent in semiconductor design, manufacturing, testing, and validation across every state in the country.
The Minister reiterated that the Government of India is committed to building a strong and self-reliant ecosystem in the semiconductor sector. Through talent development, infrastructure creation, and industry collaboration under Semicon 2.0, India aims to establish itself as a global semiconductor hub.
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