Seoul, Dec 1 Samsung Electronics is planning to use a double-stack technology to develop its next-generation V-NAND flash memory, industry officials said on Tuesday, as the world's largest memory chip producer tries to further cement its leading position in the sector.
At its investors' forum, Samsung revealed that it will apply "extreme two-stack" technology for its future NAND flash chip and that it is possible to develop a 256-layer device.
"Our sixth-generation V-NAND features up to 128 layers with single stack technology, but if we apply a double-stack technology, a 256-layer stacking is mathematically possible," said Han Jin-man, a senior vice president at Samsung's memory business unit, at the forum.
A NAND flash is a type of non-volatile memory that stores data even if power is gone.
In today's NAND flash production, a manufacturer's technological prowess can be measured by the number of memory cell layers stacked in a device, as more layers mean better capacity with enhanced bit density, reports Yonhap news agency.
A double-stack method allows integration of more layers quickly compared to a single-stack solution but requires more advanced etching technology.
Although 256-layer NAND flash is technologically achievable, Han said that does not necessarily mean that Samsung's next generation NAND will have such a layer configuration.
Samsung is currently developing its seventh generation of V-NAND that is expected to be mass-produced next year, but it has yet to unveil its layer configuration.
Samsung was the world's top NAND flash maker with a market share of 33.1 percent in the third quarter of the year, followed by Japan's Kioxia Corp. with 21.4 per cent and US chipmaker Western Digital Corp. with 14.3 per cent, according to market researcher TrendForce.
South Korea's SK hynix came in fourth with a 11.3 per cent market share.
( With inputs from IANS )
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