Samsung Foundry just announced that it will begin mass production of its first-generation chips on the 3nm node. It is based on the new transistor architecture GAA (Gate-All-Around), which is the next step after FinFET.
Compared to 5nm, Samsung's first-gen 3nm chips can provide up to 23 per cent better performance, up to 45 per cent reduced power consumption, and a 16% reduction in surface area, as per GSM Arena.
Samsung's second-generation 3nm node gets even more impressive. Compared to 5nm, Samsung announces that it will achieve a 50 per cent reduction in power consumption, a performance increase of up to 30 per cent and a 35 per cent reduction in area.
As per GSM Arena, Samsung is now ahead of TSMC, which is expected to begin mass production of 3nm chips in the second half of the year.
Gate-All-Around (GAA) transistor design allows the transistors to be encapsulated to make them smaller without sacrificing their current capability. The GAAFET design used in the 3nm node is the MBCFET type shown in the image below.
( With inputs from ANI )
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